Figure 13.2 shows the write timing to an external memory. This is an example for 24-bit address and 16-bit data buses.
Writing is completed in a 3-system clock time (3-state access).
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| Figure 13.2: Write Timing to External Memory |
Figure 13.3 shows the read/write timings including waits. If the WAIT input is at low level at the trailing edge of T2, the CPU inserts a wait state to slow reading/writing. When the WAIT input is returned to high level, reading/writing is completed.
Depending on the address output by the CPU, users have to design circuits to input WAIT signals if the memory connected to the address is slow, or to prevent WAIT signals from being input if it is fast.
The H8/3048 is provided with a wait state controller so that the wait state can be input without creating such circuits.
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| Figure 13.3: Read/Write Timings Including Waits |
Since the H8/3048 has an internal wait controller, waits can be inserted in various ways.
Wait state controller enable register (WCER)
Determines for which area the wait state controller is enabled from area 0 to area 7.
WCER H'FFFFEF address
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| Figure 13.4: Wait State Controller Enable Register (WCER) |
The wait state controller is enabled for the area with "1" written and disabled for that with "0". By default, it is enabled for all areas.
Wait control register
Determines how to insert waits for the wait-enabled area.
WCR H'FFFFEE address
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| Figure 13.5: Wait Control Register (WCR) |
Wait mode select 1 and01 (WMS1 and WMS0)
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Programmable wait mode
Without using the WAIT pin, forcibly inserts the wait set by the wait count.
Pin wait mode 1
Waits for the wait cycle specified by the program and inserts an additional wait depending on the WAIT pin status (Figure 13.3).
Pin auto wait mode
The WAIT signal input to the WAIT pin only determines whether to insert a wait state or not, and how many states to be inserted is determined by the wait count. Wait is inserted as necessary.
Wait count 1 and01 (WC1 and WC0)
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By default, the wait controller is enabled for all areas and three states are set to be inserted in programmable wait mode. In other words, three wait states are forcibly inserted in all areas. Change the setting as soon as possible after resetting if necessary.