9-8-1
#include
#include "iodefine.h"
#define size 51
struct dsp {
unsigned int SR ;
unsigned int mask ;
unsigned int RS ;
unsigned int RE ;
unsigned int MOD ;
unsigned int R2 ;
unsigned int R3 ;
unsigned int R4 ;
unsigned int R5 ;
unsigned int R6 ;
unsigned int R7 ;
unsigned int R8 ;
unsigned int R9 ;
} ;
struct dsp *flt1 , *flt2 ,f1,f2;
extern void setDSP(struct dsp*,unsigned short *,unsigned short *,unsigned short *) ;
extern unsigned int fir(struct dsp*,unsigned short) ;
extern unsigned short hn[size],hn_rom[size],xn1[size],xn2[size] ;
void initAdDa(void) ;
void initTmu0(void) ;
void initTmu1(void) ;
void initIo(void) ;
void initXYRAM() ;
void main(void) ;
void main(void){
unsigned short *p;
for(p=&xn1[0] ; p<&xn1[51] ; p++) *p = 0 ;
for(p=&xn2[0] ; p<&xn2[51] ; p++) *p = 0 ;
flt1 = &f1 ; flt2 = &f2 ;
initXYRAM() ;
set_cr(0x60001002) ; /* DSP bit on */
setDSP(flt1,&xn1[0],&xn1[50],&hn[0]) ;
setDSP(flt2,&xn2[0],&xn2[50],&hn[0]) ;
initIo() ; /* Initialize I/O port */
initAdDa() ; /* Initialize A/D1 D/A0 */
initTmu0() ; /* Initialize TMU0 */
initTmu1() ; /* Initialize TMU1 */
while(1) /* sleep()*/ ;
}
|
9-8-2
void initAdDa(void){
AD.CR.BYTE = 0x27 ; /* */
AD.CSR.BYTE = 0x32 ; /* Scan mode AN1,AN2 */
DA.DACR.BYTE = 0xe0 ; /* Enable DA0,DA1 */
PC.CR.WORD = 0x5555 ; /* Port C = output */
}
void initTmu0(void){
TMU0.TCR.WORD = 0x0020 ; /* 1/4 Pclock,Enable interrupt */
TMU0.TCNT = TMU0.TCOR = 170 ; /* 44kHz */
INTC.IPRA.BIT.UU = 15 ; /* Priority = 15 */
TMU.TSTR.BIT.STR0 = 1 ; /* Start TMU0 */
}
void initTmu1(void){
TMU1.TCR.WORD = 0x0020 ; /* 1/4 Pclock,Enable interrupt */
TMU1.TCNT = TMU1.TCOR = 74 ; /* 100kHz */
INTC.IPRA.BIT.UL = 15 ; /* Priority = 15 */
TMU.TSTR.BIT.STR1 = 1 ; /* Start TMU1 */
}
void tuni0(void){
TMU0.TCR.BIT.UNF = 0 ; /* Clear UNF bit */
DA.DADR0 = (fir(flt1,AD.DRBH<<7)+ 0x8000)>>7 ;
}
void tuni1(void){
TMU1.TCR.BIT.UNF = 0 ; /* Clear UNF bit */
DA.DADR1 = (fir(flt2,AD.DRCH<<7)+ 0x8000)>>7 ;
}
void initXYRAM(void){
unsigned short *p , *q;
for(p=&hn[0],q=&hn_rom[0] ; p < &hn[51] ; p++,q++) *p = *q ;
}
|
9-8-3
.cpu shdsp
.export _setDSP,_fir,_hn,_hn_rom,_xn1,_xn2
;void setDSP(void)
; Set DSP bit on SR (only SH3-DSP )
; Set S bit on SR (lock overflow)
_setDSP:
add #h'28,r4
mov.l r6,@-r4 ;set input address R6
add #-4,r4
mov.l r7,@-r4 ;set hn address R4
add #-8,r4
shll16 r5
xtrct r6,r5
mov.l r5,@-r4 ;set MOD
repeat lp_start,lp_start,#48
stc re,@-r4 ;set RE
stc rs,@-r4 ;set RS
mov.w set_dsp,r1
stc sr,r2
or r2,r1
mov.l msk,r2
and r2,r1
not r2,r2
mov.l r2,@-r4 ;set mask
rts
mov.l r1,@-r4 ;set SR
.align 4
msk: .data.l h'0fff1c0e
set_dsp: .data.w h'1802
|
9-8-4
; unsigned short fir( struct dsp *p,unsigned short in )
_fir:
mov.l @r4+,r0 ;get SR
mov.l @r4+,r1 ;get mask
stc sr,r2
and r2,r1
or r1,r0
ldc r0,sr ;set SR
ldc @r4+,rs ;set RS
ldc @r4+,re ;set RE
ldc @r4+,mod ;set MOD
add #h'10,r4
mov.l @r4,r6 ;set R6
mov r4,r7
add #-8,r4
mov.l @r4,r4
mov.w r5,@r6
pclr a0 movx @r4+,x0 movy @r6+,y0
pmuls x0,y0,m0 movx @r4+,x0 movy @r6+,y0
lp_start:
padd a0,m0,a0 pmuls x0,y0,m0 movx @r4+,x0 movy @r6+,y0
padd a0,m0,a0 pmuls x1,y1,m1 movx @r4+,x0 movy @r6,y0
padd a0,m0,a0 pmuls x0,y0,m0
padd a0,m0,a0
sts a0,r0
mov r6,@r7
rts
shlr16 r0
.section IN,data,locate=h'a5017000
_xn1: .res.w 51
_xn1_end: .equ $
_xn2: .res.w 51
_xn2_end: .equ $
|