Various limitations apply to the status flag such as conditions for setting/clearing and correspondence to interrupt enable bits.In addition, the status flag is used not only in the A/D converter ADCSR but also in the peripheral functions such as the SCI and ITU described in the following chapters ("R/(W)*" remarks in the following registers represent the status flag). Fully understand its use here.
Setting of the status flag
Correspondence to interrupt enable/disable bits Each status flag has corresponding interrupt enable/disable bits. The figures below show the correspondences between status flags and interrupt enable/disable bits. A peripheral function generates an interrupt request when the following conditions are satisfied. Taking the A/D converter as an example, the ADI interrupt request is generated when the ADCSR ADIE is 1, the first A/D conversion is completed and ADF becomes 1.
Here, a question arises as to when generated interrupt requests are stopped. Interrupt requests will not be stopped as long as the above conditions are satisfied. This means that interrupt requests are continuously generated even after an interrupt routine corresponding to each interrupt is executed. If the routine is stopped in this state, the same routine is executed again. Taking the A/D converter as an example, ADI interrupt routine execution is permanently continued by the end of the first A/D conversion. Since the peripheral functions do not automatically clear the status flag or interrupt enable/disable bits to 0, an instruction must be used for clearing. To use the same interrupt repeatedly, the status flag must be cleared to 0 using an instruction to stop interrupt requests. In summary, remember that the status flag must be cleared to 0 when it is confirmed to be 1 regardless of whether or not you use loops or interrupts. |