Renesas has produce a prototype CMOS device incorporating technology that uses the implantation of fluorine in the substrate to overcome the problem of increased threshold voltage (Vth), which previously has been an obstacle to the practical application of HfSiON gate dielectric film. A prototype 8Mbit SRAM that uses this technology has been produced. Despite the fact that variation in the threshold voltage is a particular problem in SRAM devices, the 8Mbit prototype achieved full operation of all bits.

Advances in scaling have led to thinner gate oxide films, which, in turn, have caused increased gate leakage current due to the phenomenon of tunneling. To overcome this problem, high-k(high permittivity) gate dielectric films is required that are physically thicker than an electrically equivalent oxide film. However, combining a polysilicon (PolySi) gate with a high-k dielectric film results in pinning at high threshold voltage(Vth) by Fermi level pinning phenomenon, a problem for low voltage operation circuits. Renesas has solved this problem by implanting fluorine in the substrate. The new semiconductor process, which was described in IEDM paper 36.7, achieves a 0.2V reduction in Vth, an improvement of 33 percent or more over previous approaches.

Because of its lightness, boron for p-type gates can easily be diffused by annealing process. Diffusion of boron from the gate to the substrate across the dielectric film results in various problems, including degraded dielectric film reliability and increased fluctuation in the threshold voltage due to non-uniform boron profile at surface of substrate. Although it has been found that implanting fluorine in the gate actually promotes the diffusion of boron from the gate, the new results show that the boron diffusion can be suppressed by implanting fluorine in the substrate.

If boron implantation is used to control the threshold value, the threshold increases and the reverse short-channel effect is encouraged, which reduces the drive capacity. Use of fluorine implantation to control the threshold is effective for dealing with these problems. Also, if fluorine implantation is used to control the threshold, the boron profile remains unchanged and a low junction leakage current can be maintained.

A new discovery is that fluorine implantation increases hole that is p-type carrier mobility. Hole mobility is reduced when a high-k film is used; yet the use of fluorine implantation has the effect of improving the hole mobility.

A prototype 8Mbit SRAM produced using the fluorine implantation technology provided excellent results in terms of on/off performance (see Figure 2). As a device, an SRAM has both a short gate length and width. The narrow channel characteristics in the gate width direction are particularly important. The reverse narrow channel effect causes the threshold to lower and the leakage current to increase as the gate width gets narrower. Although this is an issue, excellent results were achieved for both nMIS and pMIS by using a high-k film, which has thick physical thickness for the same electrically equivalent oxide thickness (EOT). Specifically currents of 615nA for nMIS and 221nA for pMIS were measured for a device with a 55nm gate length, corresponding to 65nm node (see Figures 3 and 4).

The static noise margin (SNM) for the SRAM was adequate for practical applications and measurements confirmed the reduction in gate leakage. Despite the sensitivity of SRAM to fluctuation of the threshold voltage, all bits were verified to be fully operational. Moreover, test results showed a reduction in the fluctuation (scatter) of the threshold voltage (see Figures 5 and 6).