1. What happens if an enabled interrupt request is generated while the CPU is executing a program?
(A) The current instruction is interrupted for exception handling.
(B) Exception handling is performed after the current instruction is completed.
(C) Exception handling is performed after the program is completed.
Answer: (B)
(A) disables the original program to properly continue even after execution is returned from the interrupt handling routine to the next instruction of the original program.
(C) refers to the situation where interrupts are disabled.If (C) is true, no interrupt can be generated for a program containing a loop since it is never completed.
2. Which describes the correct type of exception handling sources in the H8/3048?
(A) Reset only
(B) Interrupts only
(C) Reset and interrupts
Answer: (C)
The H8/3048 has both reset and interrupt exception handling routines.
3. What is common to all exception handling routines?
(A) Employs the vector method.
(B) Sets the I bit in the CCR to 0.
(C) Initializes the internal I/O registers.
Answer: (A)
(B) Exception handling sets the I bit to 1.
(C) Interrupts do not initialize the internal I/O registers.
4. What is the vector address?
(A) Addresses between H'000000 and H'000003 in the memory space.
(B) Start address of an exception handling routine.
(C) Specific address area for storing the start address of an exception handling routine.
(D) Specific address area for storing the return address at exception handling generation.
Answer: (C)
(A) refers to the vector address for reset only.
(B) refers to the vector.
(D) refers to the stack.
5. What do you do first after turning the microcomputer on to start execution from a particular program?
(A) Generate the NMI interrupt.
(B) Generate reset.
(C) Initialize the SP (ER7).
Answer: (B)
You must generate reset to input the start address of a particular program in the PC.
(A) does not determine to which address execution is returned by the RTE instruction at the end of the NMI interrupt handling routine.
As for (C), a program to initialize the SP cannot be started without generating reset.
6. Why is a circuit using a reset IC configured around the reset pin?
(A) To prevent overcurrent from entering the reset pin.
(B) To apply the high-level voltage to the reset pin even when the power is turned off.
(C) To apply the low-level voltage to the reset pin after the power is turned on.
Answer: (C)
The reset IC is used to apply the low-level voltage to the reset pin for a certain period of time after power-on.
7. You developed an IRQ1 interrupt handling routine.From which address do you store it?
(A) Any address excluding the vector area as long as the memory exists.
(B) H'000000.
(C) H'000034.
(D) Any address in the vector area.
Answer: (A)
(B) refers to the vector address for reset and (C) to that for IRQ1.
As for (D), no data or programs except vectors should be stored in the vector area.
8. By how many does the value in the SP (ER7) change immediately before and after an interrupt is generated?
(A) +2
(B) +4
(C) -2
(D) -4
Answer: (D)
The SP is decremented by 4 and the PC and CCR are stored in a 4-address area in the stack.